Product Summary

The LC4128V-75TN100C is a programmable superFAST high density PLD. It consists of multiple 36-input, 16-macrocell Generic Logic Blocks (GLBs) interconnected by a Global Routing Pool (GRP). Output Routing Pools (ORPs) connect the GLBs to the I/O Blocks (IOBs), which contain multiple I/O cells.

Parametrics

LC4128V-75TN100C absolute maximum ratings: (1)supply voltage: -0.5 to 5.5V; (2)output supply voltage: -0.5 to 4.5V; (3)input or I/O tristate voltage applied: -0.5 to 5.5V; (4)storage temperature: -65 to 150℃; (5)junction temperature with power applied: -55 to 150℃.

Features

LC4128V-75TN100C features: (1)Hot-socketing; (2)Open-drain capability; (3)Input pull-up, pull-down or bus-keeper; (4)Programmable output slew rate; (5)3.3V PCI compatible; (6)IEEE 1149.1 boundary scan testable; (7)3.3V/2.5V/1.8V In-System Programmable.

Diagrams

LC4128V-75TN100C block diagram 

Image Part No Mfg Description Data Sheet Download Pricing
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LC4128V-75TN100C
LC4128V-75TN100C

Lattice

CPLD - Complex Programmable Logic Devices 400MHZ 128 Macrocell 3.3 V 7.5 tPD

Data Sheet

0-1: $5.87
1-25: $5.28
25-100: $5.14
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