NHPXA270C5C520

Product Summary

The Intel NHPXA270C5C520 processor provides industry-leading multimedia performance, low-power capabilities, rich peripheral integration and second generation memory stacking. Designed from the ground up for wireless clients, it incorporates the latest Intel advances in mobile technology over its predecessor, the Intel NHPXA270C5C520 processor. These same attributes and features also make the NHPXA270C5C520 processor ideal for embedded applications. The device redefines scalability by operating from 104 MHz up to 624 MHz, providing enough performance for the most demanding mobile applications. The NHPXA270C5C520 processor is the first Intel processor to include Intel-reless MMX technology, enabling high-performance, low-power multimedia acceleration with a general-purpose instruction set. Intel-Quick Capture technology provides a flexible and powerful camera interface for capturing digital images and video. While performance is key in the NHPXA270C5C520 processor, power consumption is also a critical component. The new capabilities of Wireless Intel SpeedStep technology set the standard for low-power consumption.

Parametrics

NHPXA270C5C520 maximum ratings: (1)TS Storage temperature: –40~125 ℃; (2)VCC_OL1 Offset voltage between any of the following pins: VCC_CORE: –0.3~0.3 V; (3)VCC_OL2 Offset voltage between any of the following pins: VCC_SRAM: –0.3 0.3 V; (4)VCC_OH1 Offset voltage between any of the following pins; (5)VCC_MEM: –0.3 0.3 V; (6)VCC_OH2 Offset voltage between any of the following pins; (7)VCC_IO: –0.3 0.3 V; (8)VCC_OH3 Offset voltage between VCC_LCD<0> and VCC_LCD<1> –0.3 0.3 V; (9)VCC_HV Voltage applied to high-voltage supply pins(VCC_BB, VCC_USB, VCC_USIM, VCC_MEM,VCC_IO<, VCC_LCD) VSS–0.3 VSS: +4.0 V.

Features

NHPXA270C5C520 features: (1)High-performance processor; (2)256 Kbytes of internal SRAM for high speed code or data storage preserved during low-power states; (3)High-speed baseband processor interface; (4)Rich serial peripheral set; (5)Hardware debug features — IEEE JTAG; (6)interface with boundary scan; (7)Hardware performance-monitoring features with on-chip trace buffer; (8)Real-time clock; (9)Operating-system timers; (10)LCD Controller; (11)Universal Subscriber Identity Module interface.

Diagrams