S4804CBI30

Product Summary

The S4804CBI30 is a highly-integrated VLSI device that provides full-duplex mapping of packets or ATM cells to SONET/SDH payloads. It provides support for both uni-directional and bi-directional rings. The S4804CBI30 provides full section, line, and path overhead processing, and supports framing, scrambling/descrambling, alarm signal insertion/detection, and bit-interleaved parity (B1/B2/B3) processing. The S4804CBI30 is SONET/SDH standards compliant with Bellcore GR-253, ITU G.707, ITU-T 432.1, ANSI T1.105 -1995, and IETF RFCs 1619/1661/1662/2615. The applications of the S4804CBI30 include ATM switches, Packet over SONET Routers and Switches, SONET/SDH Add Drop Multiplexers, Terminal Multiplexers, and Digital Cross Connects, Test equipment.

Features

S4804CBI30 features: (1)Provides a SONET/SDH STS-48/STM-16, 4 STS-12/STM-4, or 16 STS-3/STM-1 line interfaces; (2)STS-48/STM-16 data stream supports a single STS-48c/AU-4-16c, or any valid combination of STS-12c/AU-4-4c and/or STS-3c/AU-4 SONET/SDH payloads; (3)Each STS-12/STM-4 data stream supports a single STS-12c/AU-4-4c or 4 STS-3c/AU-4 SONET/SDH payloads; (4)Each STS-3/STM-1 data stream supports a single STS-3c/AU-4 SONET/SDH payload; (5)Supports mixed STS-3/STS-12 line rates; (6)Provides full-duplex mapping of ATM cells or packets in each payload tributary; (7)Supports termination of mixed ATM and POS tributaries; (8)Terminates/generates SONET/SDH section, line, and path layers with transport/section E1, E2, F1, and DCC over-head interfaces in both transmit and receive directions; (9)APS port to support protection-switching configurations; (10)between two RHINE devices; (11)16-bit, bus interface at 155 MHz for STS-48/STM-16 mode, or serial interfaces operating at 622/155 MHz for STS-12/3 (STM-4/1) modes on the line side; (12)32-bit, parallel interface (FlexBus-3TM) operating at 100MHz on the system side; (13).25 micron, 2.5V core, and 3.3V tolerant I/O; (14)Packaged in a 624 Pin CBGA.

Diagrams